There may be the need in a data processing system for one component (“a transmitter”) to transfer data to another component (“a receiver”). In order to support the reliable transfer of data between the two a communication protocol may be employed which uses a pair of request and acknowledge handshake signals: for the transmitter to indicate its readiness to transfer a bundle of data bits to the receiver; and for the receiver to indicate its readiness to receive that bundle of data bits. Once this mutual readiness has been established, a transmitter can then transfer the data to the receiver. However, it may further be the case that the transmitter and receiver reside in notably different voltage environments, which can have significant consequences for the manner in which the signals propagate between the transmitter and receiver (in both directions) and in such a situation a protocol may be adopted where the basic two phase handshake protocol is extended to a more conservative four phase protocol, where both rising and falling edge transitions are signalled across the interface. Alternatively, in particular in the context of high speed serial communications, a differential signalling approach may be adopted where data and inverted data are both signalled in parallel across the interface and are converted back to a single ended value at the receiver, which is deemed to be valid when both the original data and the inverted data have stabilised within specification voltage ranges. Moreover, transmission interfaces may have input/output isolation and cross between asynchronous clock domains. As such the timing of rise and fall times across such interfaces may have to be carefully managed by design.